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microchip,xec-uart

Vendor: Microchip Technology Inc.

Description

These nodes are “uart” bus nodes.

Microchip XEC UART

Properties

Node specific properties

Deprecated node specific properties

Base properties

Properties not inherited from the base binding file.

Name

Type

Details

ldn

int

 
logical device number

This property is required.

girqs

array

 
UART GIRQ and bit position in EC interrupt aggregator

This property is required.

pcrs

array

 
UART Power Clock Reset(PCR) register index and bit position

This property is required.

pinctrl-0

phandles

 
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

 
Names for the provided states. The number of names needs to match the
number of states.

This property is required.

#girq-cells

int

Constant value: 2

#pcr-cells

int

Constant value: 2

clock-frequency

int

 
Clock frequency information for UART operation

current-speed

int

 
Initial baud rate setting for UART

hw-flow-control

boolean

 
Set to enable RTS/CTS flow control at boot time

parity

string

 
Configures the parity of the adapter. Enumeration id 0 for none, 1 for odd
and 2 for even parity. Default to none if not specified.

Legal values: 'none', 'odd', 'even'

pinctrl-1

phandles

 
Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

 
Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

 
Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

 
Pin configuration/s for the fifth state. See pinctrl-0.

Deprecated properties not inherited from the base binding file.

(None)

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “microchip,xec-uart” compatible.

Name

Type

Details

reg

array

 
register space

This property is required.

See Important properties for more information.

interrupts

array

 
interrupts for device

This property is required.

See Important properties for more information.

label

string

 
Human readable string describing the device (used as device_get_binding() argument)

This property is required.

See Important properties for more information.

status

string

 
indicates the operational status of a device

Legal values: 'ok', 'okay', 'disabled', 'reserved', 'fail', 'fail-sss'

See Important properties for more information.

compatible

string-array

 
compatible strings

This property is required.

See Important properties for more information.

reg-names

string-array

 
name of each register space

interrupts-extended

compound

 
extended interrupt specifier for device

interrupt-names

string-array

 
name of each interrupt

interrupt-parent

phandle

 
phandle to interrupt controller node

clocks

phandle-array

 
Clock gate information

clock-names

string-array

 
name of each clock

#address-cells

int

 
number of address cells in reg property

#size-cells

int

 
number of size cells in reg property

dmas

phandle-array

 
DMA channels specifiers

dma-names

string-array

 
Provided names of DMA channel specifiers

io-channels

phandle-array

 
IO channels specifiers

io-channel-names

string-array

 
Provided names of IO channel specifiers

mboxes

phandle-array

 
mailbox / IPM channels specifiers

mbox-names

string-array

 
Provided names of mailbox / IPM channel specifiers

wakeup-source

boolean

 
Property to identify that a device can be used as wake up source.

When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.

Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.

power-domain

phandle

 
Power domain the device belongs to.

The device will be notified when the power domain it belongs to is either
suspended or resumed.

Specifier cell names

  • girq cells: girq_num, bitpos

  • pcr cells: reg_idx, bitpos