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st,stm32f1-pinctrl

Vendor: STMicroelectronics

Description

STM32F1 Pin controller Node
Based on pincfg-node.yaml binding.

Note: `bias-disable` and `drive-push-pull` are default pin configurations.
       They will be applied in case no `bias-foo` or `driver-bar` properties
       are set.

Properties

Top level properties

These property descriptions apply to “st,stm32f1-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Node specific properties

Deprecated node specific properties

Base properties

Properties not inherited from the base binding file.

Name

Type

Details

swj-cfg

string

 
Configures number of pins assigned to the SWJ debug port.

* full         - Full SWJ (JTAG-DP + SW-DP).
* no-njtrst    - Full SWJ (JTAG-DP + SW-DP) but without NJTRST.
                 Releases: PB4.
* jtag-disable - JTAG-DP Disabled and SW-DP Enabled.
                 Releases: PA15 PB3 PB4.
* disable      - JTAG-DP Disabled and SW-DP Disabled.
                 Releases: PA13 PA14 PA15 PB3 PB4.

If absent, then Full SWJ (JTAG-DP + SW-DP) is used (reset state).

Default value: full

Legal values: 'full', 'no-njtrst', 'jtag-disable', 'disable'

Deprecated properties not inherited from the base binding file.

(None)

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32f1-pinctrl” compatible.

Name

Type

Details

reg

array

 
register space

This property is required.

See Important properties for more information.

status

string

 
indicates the operational status of a device

Legal values: 'ok', 'okay', 'disabled', 'reserved', 'fail', 'fail-sss'

See Important properties for more information.

compatible

string-array

 
compatible strings

This property is required.

See Important properties for more information.

reg-names

string-array

 
name of each register space

interrupts

array

 
interrupts for device

See Important properties for more information.

interrupts-extended

compound

 
extended interrupt specifier for device

interrupt-names

string-array

 
name of each interrupt

interrupt-parent

phandle

 
phandle to interrupt controller node

label

string

 
Human readable string describing the device (used as device_get_binding() argument)

See Important properties for more information.

clocks

phandle-array

 
Clock gate information

clock-names

string-array

 
name of each clock

#address-cells

int

 
number of address cells in reg property

#size-cells

int

 
number of size cells in reg property

dmas

phandle-array

 
DMA channels specifiers

dma-names

string-array

 
Provided names of DMA channel specifiers

io-channels

phandle-array

 
IO channels specifiers

io-channel-names

string-array

 
Provided names of IO channel specifiers

mboxes

phandle-array

 
mailbox / IPM channels specifiers

mbox-names

string-array

 
Provided names of mailbox / IPM channel specifiers

wakeup-source

boolean

 
Property to identify that a device can be used as wake up source.

When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.

Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.

power-domain

phandle

 
Power domain the device belongs to.

The device will be notified when the power domain it belongs to is either
suspended or resumed.

Child node properties

Name

Type

Details

pinmux

int

 
Adapted from https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
Integer array, represents gpio pin number and mux setting.
These defines are calculated as: ((port * 16 + line) << 8) | (function << 6) | remap)
With:
- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
- function: The configuration mode, can be:
* 0 : Alternate function output
* 1 : Input
* 2 : Analog
* 3 : GPIO output
In case selected pin function is GPIO output, pin is statically configured as
a plain output GPIO, which configuration can be set by adding 'ouptut-low' or
'output-high' properties to the pinctrl configuration. Default is output-low.
- remap: The pin remapping configuration. It allows to assign the pin
function to a different peripheral. Remain configuration can be:
* 0 : No remap
* 1 : Partial remap 1
* 2 : Partial remap 2
* 3 : Partial remap 3
* 4 : Full remap
To simplify the usage, macro is available to generate "pinmux" field.
This macro is available here:
  -include/zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h
Some examples of macro usage:
   GPIO A9 set as alernate with no remap
... {
         pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_NO)>;
};
   GPIO A9 set as alernate with full remap
... {
         pinmux = <STM32F1_PINMUX('A', 9, ALTERNATE, REMAP_FULL)>;
};
   GPIO A9 set as input
... {
         pinmux = <STM32F1_PINMUX('A', 9, GPIO_IN, REMAP_NO)>;
};
   GPIO A9 set as output-high
... {
         pinmux = <STM32F1_PINMUX('A', 9, GPIO_OUT, REMAP_NO)>;
         output-high;
};

This property is required.

slew-rate

string

 
Pin output mode, maximum achievable speed. Only applies to
output mode (alternate).

Default value: max-speed-10mhz

Legal values: 'max-speed-10mhz', 'max-speed-2mhz', 'max-speed-50mhz'

bias-disable

boolean

 
disable any pin bias

bias-pull-up

boolean

 
enable pull-up resistor

bias-pull-down

boolean

 
enable pull-down resistor

drive-push-pull

boolean

 
drive actively high and low

drive-open-drain

boolean

 
drive with open drain (hardware AND)

output-low

boolean

 
set the pin to output mode with low level

output-high

boolean

 
set the pin to output mode with high level