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ARM Cortex-A53 Emulation (QEMU)
Overview
This board configuration will use QEMU to emulate a generic Cortex-A53 hardware platform.
This configuration provides support for an ARM Cortex-A53 CPU and these devices:
GIC-400 interrupt controller
ARM architected timer
PL011 UART controller
Hardware
Supported Features
The following hardware features are supported:
Interface |
Controller |
Driver/Component |
---|---|---|
GIC |
on-chip |
interrupt controller |
PL011 UART |
on-chip |
serial port |
ARM TIMER |
on-chip |
system clock |
The kernel currently does not support other hardware features on this platform.
Devices
System Clock
This board configuration uses a system clock frequency of 62.5 MHz.
Serial Port
This board configuration uses a single serial communication channel with the CPU’s UART0.
Known Problems or Limitations
The following platform features are unsupported:
Writing to the hardware’s flash memory
Programming and Debugging
Use this configuration to run basic Zephyr applications and kernel tests in the QEMU emulated environment, for example, with the Synchronization Sample:
# From the root of the zephyr repository
west build -b qemu_cortex_a53 samples/synchronization
west build -t run
This will build an image with the synchronization sample app, boot it using QEMU, and display the following console output:
***** Booting Zephyr OS build zephyr-v2.0.0-1657-g99d310da48e5 *****
threadA: Hello World from qemu_cortex_a53!
threadB: Hello World from qemu_cortex_a53!
threadA: Hello World from qemu_cortex_a53!
threadB: Hello World from qemu_cortex_a53!
threadA: Hello World from qemu_cortex_a53!
threadB: Hello World from qemu_cortex_a53!
threadA: Hello World from qemu_cortex_a53!
threadB: Hello World from qemu_cortex_a53!
Exit QEMU by pressing CTRL+A x.
Debugging
Refer to the detailed overview about Application Debugging.
Networking
References
(ID050815) ARM® Cortex®-A Series - Programmer’s Guide for ARMv8-A
(ID070919) Arm® Architecture Reference Manual - Armv8, for Armv8-A architecture profile
(ARM DAI 0527A) Application Note Bare-metal Boot Code for ARMv8-A Processors
AArch64 Exception and Interrupt Handling
Fundamentals of ARMv8-A